公司簡介
Analog Devices Inc.(簡稱ADI)，為全球類比IC第二名的供應商。自1965年創建以來，多次被 Fortune 雜誌獲選為世界五百大及美國前一百大最嚮往為它工作的企業，且榮登商業週刊全球最佳百大科技公司第十名 。ADI設計、製造、行銷Mix Signal, Digital Signal Processors, D/A, A/D Converter 高功能積體電路產品(ICs)，Analog Devices美商亞德諾公司是全球精密高效能積體電路的領導廠商，產品廣泛用在類比和數位訊號處理應用中。公司總部設在美國麻薩諸塞州諾伍德市，擁有員工約15,000人，製造廠遍布世界各地在麻州、加州、愛爾蘭、菲律賓皆有製造廠，ADI公司的股票在紐約證券交易所上市，並且納入標準普爾指數500家 (S&P 500 Index)。 ADI 網站：https://www.analog.com
(2026 New College Grad) Analog Design Engineer(Power)
工作內容
Tasks & Responsibilities
Responsibilities may include but are not limited to:
• Creating transistor-level analog circuits to meet performance specifications
• Verifying designs using circuit-level and behavioral-level simulations
• Supervising and reviewing circuit layout
• Performing AMS simulations for top-level verification
• Modeling DC-DC switching regulator behavior using Simplis or Verilog-A
• Reading and understanding Verilog RTL code
• Writing circuit documentation and test plan
• Validating and debugging circuit performance in the lab
• Collaborating with cross-functional teams including applications, test engineering, and other design groups.
Qualifications & Skills
• Minimum qualification:
o Bachelor’s degree in Electrical Engineering or related field
o Strong understanding of analog IC design fundamentals
o Solid knowledge of basic analog circuit topologies and layout principles
o Effective written and verbal communication skills in English
o Strong teamwork and collaboration skills
• Preferred qualification:
o Master’s degree in Electrical Engineering or related field
o Research experience related to IC design
o Familiarity with Cadence design environment and analog simulation tools.
o Experience with Simplis is a plus
o Knowledge of Verilog-A, Verilog-AMS or WREAL modeling is a plus
o Understanding of Verilog hardware description language is a plus
o Proficiency in at least one scripting language (Python, shell-scripting, etc.).
詳細內容請參考：https://www.104.com.tw/job/85p23?jobsource=m_cs_sub_custlist_rc
(2026 New College Grad) Digital Design Engineer
工作內容
Tasks & Responsibilities
Responsibilities may include but are not limited to:
• Designing and implementing digital functions within mixed-signal ICs to meet product specifications
• Performing RTL design and simulation to ensure functional correctness
• Executing Synthesis, STA, Formal Verification, DFT, ATPG tasks and ECO flows
• Conducting block-level and chip-level verification and regression testing
• Writing circuit documentation and test plans
• Validating and debugging circuit performance in the lab
• Collaborating with cross-functional teams including applications, test engineering, and other design groups
Qualifications & Skills
• Minimum qualifications:
o Bachelor’s degree in Electrical Engineering or related field
o Strong foundation in digital IC design principles
o Effective written and verbal communication skills in English
o Strong collaboration and teamwork abilities
• Preferred qualifications:
o Master’s degree in Electrical Engineering or related field
o Research experience related to IC design
o Familiarity with Verilog RTL design and simulation
o Knowledge of System Verilog and UVM (Universal Verification Methodology)
o Experience with Verilog-AMS or WREAL modeling is a plus
o Proficiency in at least one scripting language (Tcl, Perl, Python, shell-scripting, etc.)
詳細內容請參考：https://www.104.com.tw/job/8tj3r?jobsource=m_cs_sub_custlist_rc
若對以上職缺有興趣者，歡迎於2025.11前準備履歷至電機系辦公室諮詢。